000 06061nam a22006015i 4500
001 978-3-319-02444-8
003 DE-He213
005 20240730172036.0
007 cr nn 008mamaa
008 130829s2013 sz | s |||| 0|eng d
020 _a9783319024448
_9978-3-319-02444-8
024 7 _a10.1007/978-3-319-02444-8
_2doi
050 4 _aQA76.758
072 7 _aUMZ
_2bicssc
072 7 _aCOM051230
_2bisacsh
072 7 _aUMZ
_2thema
082 0 4 _a005.1
_223
245 1 0 _aAutomated Technology for Verification and Analysis
_h[electronic resource] :
_b11th International Symposium, ATVA 2013, Hanoi, Vietnam, October 15-18, 2013, Proceedings /
_cedited by Dang Van Hung, Mizuhito Ogawa.
250 _a1st ed. 2013.
264 1 _aCham :
_bSpringer International Publishing :
_bImprint: Springer,
_c2013.
300 _aXIV, 528 p. 115 illus.
_bonline resource.
336 _atext
_btxt
_2rdacontent
337 _acomputer
_bc
_2rdamedia
338 _aonline resource
_bcr
_2rdacarrier
347 _atext file
_bPDF
_2rda
490 1 _aProgramming and Software Engineering,
_x2945-9168 ;
_v8172
505 0 _aInvited Papers.-Acceleration for Petri Nets -- Automated Verification and Strategy Synthesis for Probabilistic Systems -- SMT-Based Software Model Checking: Explicit Scheduler, Symbolic Threads -- Regular Papers.-Effective Translation of LTL to Deterministic Rabin Automata: Beyond the (F,G)-Fragment -- Improved Upper and Lower Bounds for B¨uchi Disambiguation -- Time-Bounded Reachability for Monotonic Hybrid Automata: Complexity and Fixed Points -- An Automatic Technique for Checking the Simulation of Timed Systems -- Synthesis of Bounded Integer Parameters for Parametric Timed Reachability Games -- Kleene Algebras and Semimodules for Energy Problems -- Looking at Mean-Payoff and Total-Payoff through Windows -- Weighted Safety -- A Framework for Ranking Vacuity Results -- Synthesizing Masking Fault-Tolerant Systems from Deontic Specifications -- Verification of a Dynamic Management Protocol for Cloud Applications -- Compact Symbolic Execution -- Multi-threaded Explicit State Space Exploration with State Reconstruction -- Verification of Heap Manipulating Programs with Ordered Data by Extended Forest Automata -- Integrating Policy Iterations in Abstract Interpreters -- Interpolation Properties and SAT-Based Model Checking -- Analysis of Message Passing Programs Using SMT-Solvers -- An Expressive Framework for Verifying Deadlock Freedom -- Expected Termination Time in BPA Games -- Precise Cost Analysis via Local Reasoning -- Control Flow Refinement and Symbolic Computation of Average Case Bound -- Termination and Cost Analysis of Loops with Concurrent Interleavings -- Linear Ranking for Linear Lasso Programs -- Merge and Conquer: State Merging in Parametric Timed Automata -- An Automata-Theoretic Approach to Reasoning about Parameterized Systems and Specifications -- Pushdown Systems with Stack Manipulation -- Robustness Analysis of String Transducers -- Tool Papers -- Manipulating LTL Formulas Using Spot 1.0 -- Rabinizer 2: Small Deterministic Automata for LTL\GU -- LTL Model Checking with Neco.-Solving Parity Games on the GPU -- PyEcdar: Towards Open Source Implementation for Timed Systems -- CCMC: A Conditional CSL Model Checker for Continuous-Time Markov Chains -- NLTOOLBOX: A Library for Reachability Computation of Nonlinear Dynamical Systems -- CELL: A Compositional Verification Framework -- VCS: A Verifier for Component-Based Systems -- SmacC: A Retargetable Symbolic Execution Engine -- MoTraS: A Tool for Modal Transition Systems and Their Extensions -- Cunf: A Tool for Unfolding and Verifying Petri Nets with Read Arcs -- Short Papers -- SAT Based Verification of Network Data Planes -- A Theory for Control-Flow Graph Exploration -- The Quest for Precision: A Layered Approach for Data Race Detection in Static Analysis.
520 _aThis book constitutes the refereed proceedings of the 11th International Symposium on Automated Technology for Verification and Analysis, ATVA 2013, held at Hanoi, Vietnam, in October 2013. The 27 regular papers, 3 short papers and 12 tool papers presented together with 3  invited talks were carefully selected from73 submissions. The papers are organized in topical, sections on analysis and verification of hardware circuits, systems-on-chip and embedded systems, analysis of real-time, hybrid, priced/weighted and probabilistic systems, deductive, algorithmic, compositional, and abstraction/refinement techniques for analysis and verification, analytical techniques for safety, security, and dependability, testing and runtime analysis based on verification technology, analysis and verification of parallel and concurrent hardware/software systems, verification in industrial practice, and applications and case studies.
650 0 _aSoftware engineering.
_94138
650 0 _aComputer programming.
_94169
650 0 _aComputer networks .
_931572
650 0 _aComputer science.
_99832
650 0 _aCompilers (Computer programs).
_93350
650 1 4 _aSoftware Engineering.
_94138
650 2 4 _aProgramming Techniques.
_9101448
650 2 4 _aComputer Communication Networks.
_9101450
650 2 4 _aComputer Science Logic and Foundations of Programming.
_942203
650 2 4 _aCompilers and Interpreters.
_931853
700 1 _aVan Hung, Dang.
_eeditor.
_4edt
_4http://id.loc.gov/vocabulary/relators/edt
_9101453
700 1 _aOgawa, Mizuhito.
_eeditor.
_4edt
_4http://id.loc.gov/vocabulary/relators/edt
_9101454
710 2 _aSpringerLink (Online service)
_9101457
773 0 _tSpringer Nature eBook
776 0 8 _iPrinted edition:
_z9783319024431
776 0 8 _iPrinted edition:
_z9783319024455
830 0 _aProgramming and Software Engineering,
_x2945-9168 ;
_v8172
_9101459
856 4 0 _uhttps://doi.org/10.1007/978-3-319-02444-8
912 _aZDB-2-SCS
912 _aZDB-2-SXCS
912 _aZDB-2-LNC
942 _cELN
999 _c87963
_d87963