Hardware and Software: Verification and Testing (Record no. 57196)
[ view plain ]
000 -LEADER | |
---|---|
fixed length control field | 03978nam a22005775i 4500 |
001 - CONTROL NUMBER | |
control field | 978-3-319-13338-6 |
005 - DATE AND TIME OF LATEST TRANSACTION | |
control field | 20200421112051.0 |
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION | |
fixed length control field | 141103s2014 gw | s |||| 0|eng d |
020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
ISBN | 9783319133386 |
-- | 978-3-319-13338-6 |
082 04 - CLASSIFICATION NUMBER | |
Call Number | 005.1 |
245 10 - TITLE STATEMENT | |
Title | Hardware and Software: Verification and Testing |
Sub Title | 10th International Haifa Verification Conference, HVC 2014, Haifa, Israel, November 18-20, 2014. Proceedings / |
300 ## - PHYSICAL DESCRIPTION | |
Number of Pages | XVI, 302 p. 78 illus. |
490 1# - SERIES STATEMENT | |
Series statement | Lecture Notes in Computer Science, |
505 0# - FORMATTED CONTENTS NOTE | |
Remark 2 | Using Coarse-Grained Abstractions to Verify Linearizability on TSO Architectures -- Enhancing Scenario Quality Using Quasi-Events -- Combined Bounded and Symbolic Model Checking for Incomplete Timed Systems -- DynaMate: Dynamically Inferring Loop Invariants for Automatic Full Functional Verification -- Generating Modulo-2 Linear Invariants for Hardware Model Checking -- Suraq - A Controller Synthesis Tool Using Uninterpreted Functions -- Synthesizing Finite-State Protocols from Scenarios and Requirements -- Automatic Error Localization for Software Using Deductive Verification -- Generating JML Specifications from Alloy Expressions -- Assume-Guarantee Abstraction Refinement Meets Hybrid Systems -- Handling TSO in Mechanized Linearizability Proofs -- Partial Quantifier Elimination -- Formal Verification of 800 Genetically Constructed Automata Programs: A Case Study -- A Framework to Synergize Partial Order Reduction with State Interpolation -- Reduction of Resolution Refutations and Interpolants via Subsumption -- Read, Write and Copy Dependencies for Symbolic Model Checking -- Efficient Combinatorial Test Generation Based on Multivalued Decision Diagrams -- Formal Verification of Secure User Mode Device Execution with DMA -- Supervisory Control of Discrete-Event Systems via IC3 -- Partial-Order Reduction for Multi-core LTL Model Checking -- A Comparative Study of Incremental Constraint Solving Approaches in Symbolic Execution. |
520 ## - SUMMARY, ETC. | |
Summary, etc | This book constitutes the refereed proceedings of the 10th International Haifa Verification Conference, HVC 2014, held in Haifa, Israel, in November 2014. The 17 revised full papers and 4 short papers presented were carefully reviewed and selected from 43 submissions. The papers cover a wide range of topics in the sub-fields of testing and verification applicable to software, hardware, and complex hybrid systems. |
700 1# - AUTHOR 2 | |
Author 2 | Yahav, Eran. |
856 40 - ELECTRONIC LOCATION AND ACCESS | |
Uniform Resource Identifier | http://dx.doi.org/10.1007/978-3-319-13338-6 |
942 ## - ADDED ENTRY ELEMENTS (KOHA) | |
Koha item type | eBooks |
264 #1 - | |
-- | Cham : |
-- | Springer International Publishing : |
-- | Imprint: Springer, |
-- | 2014. |
336 ## - | |
-- | text |
-- | txt |
-- | rdacontent |
337 ## - | |
-- | computer |
-- | c |
-- | rdamedia |
338 ## - | |
-- | online resource |
-- | cr |
-- | rdacarrier |
347 ## - | |
-- | text file |
-- | |
-- | rda |
650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
-- | Computer science. |
650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
-- | Computer communication systems. |
650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
-- | Software engineering. |
650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
-- | Programming languages (Electronic computers). |
650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
-- | Computer logic. |
650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
-- | Mathematical logic. |
650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
-- | Artificial intelligence. |
650 14 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
-- | Computer Science. |
650 24 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
-- | Software Engineering. |
650 24 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
-- | Logics and Meanings of Programs. |
650 24 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
-- | Programming Languages, Compilers, Interpreters. |
650 24 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
-- | Artificial Intelligence (incl. Robotics). |
650 24 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
-- | Mathematical Logic and Formal Languages. |
650 24 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
-- | Computer Communication Networks. |
830 #0 - SERIES ADDED ENTRY--UNIFORM TITLE | |
-- | 0302-9743 ; |
912 ## - | |
-- | ZDB-2-SCS |
912 ## - | |
-- | ZDB-2-LNC |
No items available.